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SG6521 -- PC Power Supply Supervisors September 2008 SG6521 -- PC Power Supply Supervisors Features Two 12V Sense Input Pins: VS12 and VS12B Over-Voltage Protection (OVP) for 3.3V, 5V, and two 12V Over-Current Protection (OCP) for 3.3V, 5V, and two 12V Under-Voltage Protection (UVP) for 3.3V, 5V, and two 12V Open-Drain Output for PGO and FPO Pins 300ms Power-Good Delay 2.8ms PSON Control to FPO Turn-off Delay 48ms PSON Control Delay No Lock-up During the Fast AC Power On/Off Wide Supply Voltage Range: 4V to 15V Over-Temperature Protection (OTP) Additional Protection Input (Pext) Description The SG6521 is designed to provide the supply voltage, current supervisor, remote on/off (PSON), power good (PGO) indicator, and fault protection (FPO) functions for switching power systems. For supervisory functions, it provides the over-voltage protection (OVP) for 3.3V, 5V, and two 12V; overcurrent protection (OCP) for 3.3V, 5V, and two 12V; under-voltage protection (UVP) for 3.3V, 5V, and two 12V. When 3.3V, 5V, or 12V voltage decreases to 2.3V, 3.5V, and 9V, respectively, the under-voltage protection function is enabled. FPO is set HIGH to turn off the PWM controller IC. The voltage difference across external current shunt is used for OCP functions. An external resistor can be used to adjust protection threshold. An additional protection input pin provides the flexibility for designing protection circuits. The power supply is turned on after a 48ms delay when PSON signal is set from HIGH to LOW. To turn off the power supply, the PSON signal is set from LOW to HIGH with a delay of 48ms. The PGI circuitry provides a power-down warning signal for PGO. When PGI input is lower than the internal 1.25V reference voltage, PGO signal is pulled LOW. Applications Switch-Mode Power Supplies with Active PFC Servo System Power Supplies PC-ATX Power Supplies Ordering Information Part Number SG6521DZ SG6521SZ Operating Temperature Range -40C to +85C -40C to +85C Eco Status RoHS RoHS Package 16-pin Dual In-Line Package (DIP) 16-pin Small Outline Package (SOP) Packing Method Rail Tape & Reel For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com SG6521 -- PC Power Supply Supervisors Application Diagram Figure 1. Typical Application (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 2 SG6521 -- PC Power Supply Supervisors Block Diagram Figure 2. Function Block Diagram (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 3 SG6521 -- PC Power Supply Supervisors Pin Configuration Figure 3. Pin Configuration(Top View) Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name PGI GND FPO PSON IS12 RI IS12B VS12B Pext IS5 IS33 VS12 VS33 VS5 VDD PGO Description Power Good Input. For ATX SMPS, it detects AC line voltage through the main transformer. Ground. Fault Protection Output. Output signal to control the primary PWM IC through an optocoupler. When FPO is low, the PWM IC is enabled. Remote On/Off Logic Input from CPU or Main Board. The power supply is turned on/off after a 48ms delay. 12V Over-Current Protection Sense Input. For typical applications, this pin is connected to the positive end of a current shunt through one resistor. When the voltage on IS12 is higher than that of VS12 by 5mV, OCP is enabled. Reference Setting. One external resistor RI connected between the RI and GND pins determines a reference current, IREF = 1.25/RI, for OCP programming. 12V Over-Current Protection Sense Input. For typical application, this pin is connected to the positive end of a current shunt through one resistor. When the voltage on IS12 is higher than that of VS12 by 5mV, OCP is enabled. Second 12V Over/Under-Voltage Control Sense Input. External Protection Detects Input. 5V Over-Current Protection Sense Input. 3.3V Over-Current Protection Sense Input. 12V Over/Under-Voltage Control Sense Input. 3.3V Over/Under-Voltage Control Sense Input. 5V Over/Under-Voltage Control Sense Input. Supply Voltage. 4.2V ~ 15V. For ATX SMPS, it is connected to 5V-standby and 12V through diodes, respectively. Power-Good Logic Output. 0 or 1 (open-drain). Power good=1 means that the power supply is good for operation. The power good delay is 300ms. (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 4 SG6521 -- PC Power Supply Supervisors Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VDD VIN VOUT TJ TSTG TL ESD DC Supply Voltage Input Voltage Output Voltage Parameter PSON, PGI, VS5, IS5, VS33, IS33, Pext VS12, VS12B, IS12, IS12B FPO, PGO Min. -0.3 -0.3 -0.3 -40 -55 Human Body Model: JESD22-A114 Machine Model: JESD22-A115 Max. 16 7.0 15.0 8.0 +125 +150 +260 3.0 200 Unit V V V V C C C KV V Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering) Electrostatic Discharge Capability Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Operating Ambient Temperature Min. -40 Typ. Max. +85 Unit C (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 5 SG6521 -- PC Power Supply Supervisors Electrical Characteristics VDD = 5V, and TA = 25C unless otherwise noted. Symbol Parameter Conditions Min. 4.2 Typ. Max. 15.0 2.6 1.5 4.2 Units V mA mA ms V VDD Section VDD DC Supply Voltage IDD1 Supply Current PSON = LOW IDD2 Supply Current PSON = HIGH tR Supply Voltage Rising Time VST VDD Start Threshold Voltage Over-Voltage (OVP) and Over-Current (OCP) Protections VS33 VOVP Over-Voltage Protection VS5 VS12, VS12B Ratio of Current Sense Sink Current RI = 18.5k ~75k IREF to Current Sense Setting Pin (RI) Source Current VOFFSET OCP Comparator Input Offset Voltage ILKG-FPO Leakage Current (FPO) FPO = 5V VOL-FPO Low-Level Output Voltage (FPO) ISINK 20mA tOVP OVP Delay Time tOCP OCP Delay Time VRI RI Pin Voltage IRI Output Current RI 0.6V < PGI < 1.25V; tST-OCP Startup OCP / UVP Protection Time FPO = Low Under-Voltage Protection and PGI, PGO VPGI_1 Input Threshold Voltage PGI 1 VPGI_2 Input Threshold Voltage PGI 2 VS33 VUVP Under-Voltage Protection VS5 VS12, VS12B tOND Under-Voltage Turn-on Delay PGI>0.6V tUVP UVP Delay PGI>1.25V ILKG-PGO Leakage Current (PGO) PGO = 5V VDD = 12V; ISINK VOL-PGO Low-Level Output Voltage (PGO) 10mA tPG Timing PG Delay tND1 Noise Deglitch Time PSON = 0V PSON Control IPSON Input Pull-up Current VIH High-Level Input Voltage VIL Low-Level Input Voltage tPSON Timing PSON to On/Off 1.7 1.0 1 3.7 5.7 13.2 7.6 -3 3.9 6.1 13.8 8.0 4.1 6.5 14.4 8.4 3 5 0.4 110 27.5 1.01*Typ. 62.5 114 1.02*Typ. 1.03*Typ. 2.5 3.7 9.5 114 4.0 5 0.4 V 33 12.5 0.98*Typ. 12.5 49 0.98*Typ. 0.96*Typ. 2.1 3.3 8.5 49 2.4 75 20.0 1.25 75 1.25 0.60 2.3 3.5 9.0 75 3.2 mV A V s ms V A ms V V V ms ms A V ms s A V V ms 200 90 300 150 120 450 210 2 0.8 PSON LOW to FPO LOW PSON HIGH to PGO LOW 34 34 1.6 1.20 2.4 48 48 2.8 1.25 3.2 67 67 4.5 1.30 4.0 tPSOFF Timing PGO LOW to FPO HIGH External Protection Detect Section VTH Pext Threshold tPext Pext Delay Time ms V ms (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 6 SG6521 -- PC Power Supply Supervisors Functional Description The SG6521 is designed to provide the supply voltage, current supervisor, remote on/off (PSON), power-good (PGO) indicator, and fault protection (FPO) functions for switching power systems. For supervisory functions, it provides the over-voltage protection (OVP) for 3.3V, 5V, and two 12V; overcurrent protection (OCP) for 3.3V, 5V, and two 12V; under-voltage protection (UVP) for 3.3V, 5V, and two 12V. When 3.3V, 5V, or 12V voltage decreases to 2.3V, 3.5V, and 9V, respectively, the under-voltage protection function is enabled. FPO is set HIGH to turn off the PWM controller IC. The voltage difference across external current shunt is used for OCP functions. An external resistor can be used to adjust protection threshold. An additional protection input pin provides the flexibility for designing protection circuits. The power supply is turned on after a 48ms delay when PSON signal is set from HIGH to LOW. To turn off the power supply, the PSON signal is set from LOW to HIGH with a delay of 48ms. The PGI circuitry provides a power-down warning signal for PGO. When PGI input is lower than the internal 1.25V reference voltage, PGO signal is pulled LOW. The SG6521 provides over-current protection for the 3.3V, 5V, and two 12V rails. Whenever an OCP condition occurs at any of the voltage rails, PGO is LOW and FPO is open. The internal OCP comparators have a very small offset voltage ( 3mV). The sink currents of IS33, IS5, and IS12 are eight times the current at the RI pin. The current at the RI pin is VRI/RI. Here is an example demonstrating how to set the over current protection. If I1xR1 > IRIxR2, OCP is active. If R1=5m, RI=30K, and the OCP active level is 35A, then the R2 resistor is: R2 = I1 x R 1 = 525 IRI x 8 (1) where C is bypass noise, suggested value is between 1F ~ 2.2F Figure 4. OCP Setup (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 7 SG6521 -- PC Power Supply Supervisors Timing Chart Figure 5. Timing Diagram (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 8 SG6521 -- PC Power Supply Supervisors Typical Performance Characteristics 8.500 2.000 8.300 1.900 7.900 IDD1 (mA) -40 -25 -10 5 20 35 50 65 Temperature () 80 95 110 125 8.100 IREF 1.800 1.700 7.700 1.600 7.500 1.500 -40 -25 -10 5 20 35 50 65 Temperature () 80 95 110 125 Figure 6. IREF vs. TA Figure 7. IDD1 vs. TA 2.000 28.000 26.000 24.000 1.200 VOFFSET(mV) Tocp (mS) 0.400 22.000 20.000 -0.400 -1.200 18.000 16.000 -2.000 -40 -25 -10 5 20 35 50 Temperature () 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 Temperature () 80 95 110 125 Figure 8. VOFFSET vs. TA Figure 9. TOCP vs. TA 1.30 1.30 1.28 1.28 VRI (V) VPG I(V) 1.26 1.26 1.24 1.24 1.22 1.22 1.20 -40 -25 -10 5 20 35 50 65 Temperature () 80 95 110 125 1.20 -40 -25 -10 5 20 35 50 65 Temperature () 80 95 110 125 Figure 10. VRI vs. TA Figure 11. VPGI vs. TA (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 9 SG6521 -- PC Power Supply Supervisors Physical Dimensions 19.68 18.66 A 16 9 6.60 6.09 1 8 (0.40) TOP VIEW 0.38 MIN 5.33 MAX 3.42 3.17 3.81 2.92 2.54 0.58 A 0.35 1.78 1.14 17.78 SIDE VIEW NOTES: UNLESS OTHERWISE SPECIFIED A THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BB B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) DRAWING FILE NAME: N16EREV1 Figure 12. 16-Lead, Dual Inline Package (DIP) 8.13 7.62 0.35 0.20 8.69 15 0 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 10 SG6521 -- PC Power Supply Supervisors Physical Dimensions (Continued) 10.00 9.80 8.89 16 9 A B 1.75 6.00 4.00 3.80 5.6 PIN ONE NDICATOR 1 8 1.27 (0.30) 0.51 0.35 0.25 M 1.27 CBA 0.65 LAND PATTERN RECOMMENDATION 1.75 MAX 1.50 1.25 0.25 0.10 C 0.10 C SEE DETAIL A 0.25 0.19 0.50 0.25 X 45 (R0.10) (R0.10) 8 0 0.36 GAGE PLANE NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AC, ISSUE C. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P600X175-16AM F) DRAWING FILE NAME: M16AREV12. 0.90 0.50 (1.04) SEATING PLANE DETAIL A SCALE: 2:1 Figure 13. 16-Lead, Small Outline Integrated Circuit (SOIC) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 11 SG6521 -- PC Power Supply Supervisors (c) 2007 Fairchild Semiconductor Corporation SG6521 * Rev. 1.0.0 www.fairchildsemi.com 12 |
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